Consider an ac circuit containing resistance of R ohms, inductance of L henries and capacitance of C farads connected in series, as shown in Fig. 4.23 (a).

Let the current flowing through the circuit be of I amperes and supply frequency be f Hz.

Voltage drop across resistance, VR = IR in phase with I


Voltage drop across inductance, VL= IωL leading I by π/2 radians or 90°

Voltage drop across capacitance, VC = I/ω C or IXC lagging behind I by π/2 radians or 90°

VL and VC are 180″ out of phase with each other (or reverse in phase), therefore, when combined by parallelogram they cancel each other. The circuit can either be effectively inductive or capacitive depending upon which voltage drop (VL or VC) is predominant. Let us consider the case when VL is greater than VC.

The applied voltage V, being equal to the phasor sum of VR, VL and VC is given in magnitude by:

Phase angle ɸ between voltage and current is given by:

ɸ will be + ve i.e. applied voltage will lead the current if XL > Xc and 3> will be – ve i.e., applied voltage will be behind the current if XL < Xc.

Power factor of the circuit is given by:

Power consumed in the circuit, P = I2 R or V I cos ɸ.


Inductive reactance, XL is directly proportional to frequency being equal to ωL or 2 π f L and capacitive reactance, XC is inversely proportional to frequency being equal to 1/ω C or 1/2 π fC.

Inductive reactance causes the current to lag behind the applied voltage, while the capacitive reactance causes the current to lead the voltage. So when inductance and capacitance are connected in series, their effects neutralize each other and their combined effect is then their difference.


The combined effect of inductive reactance and capacitive reactance is called the reactance and is found by subtracting the capacitive reactance from the inductive reactance or according to equation:

X = XL – XC

When XL > XC i.e. XL – XC is positive, the circuit is inductive and phase angle is ɸ positive.

When XL < XC i.e. XL – XC is negative, the circuit is capacitive and phase angle is ɸ negative.


When XL = XC i.e. XL – XC = 0, the circuit is purely resistive and phase angle ɸ is zero.

If the expression for applied voltage is taken as:

v = Vmax Sin ωt

Then expression for the current will be:

The value of ɸ will be positive when current leads i.e., when XC > XL and negative when current lags i.e., when XL > XC.